Digital design : (Record no. 475)
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000 -LEADER | |
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fixed length control field | 03634cam a22002174a 4500 |
001 - CONTROL NUMBER | |
control field | 1709 |
005 - DATE AND TIME OF LATEST TRANSACTION | |
control field | 20200702104708.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 050502s2006 njua 001 0 eng |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9788131708149 |
040 ## - CATALOGING SOURCE | |
Transcribing agency | PK |
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.39/5 |
Edition number | 22 |
Item number | W149 |
100 1# - MAIN ENTRY--PERSONAL NAME | |
Personal name | Wakerly, John F. |
245 10 - TITLE STATEMENT | |
Title | Digital design : |
Remainder of title | principles and practices / |
Statement of responsibility, etc | John F. Wakerly. |
250 ## - EDITION STATEMENT | |
Edition statement | 4th ed. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc | New Delhi : |
Name of publisher, distributor, etc | Pearson/Prentice Hall, |
Date of publication, distribution, etc | 2007 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | xxiv, 895 p. |
Other physical details | ill. ; |
Dimensions | 25 cm. |
500 ## - GENERAL NOTE | |
General note | Includes index. |
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Digital integrated circuits |
General subdivision | Design and construction. |
942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
Koha item type | Books |
505 0# - FORMATTED CONTENTS NOTE | |
Formatted contents note | (Note: most chapters conclude with references, drill problems, and exercises.)1. Introduction. About digital design. Analog versus digital. Digital devices. Electronic aspects of digital design. Software aspects of digital design. Integrated circuits. Programmable logic devices. Application-specific ics. Printed-circuit boards. Digital-design levels. The name of the game. Going forward.2. Number systems and codes. Positional number systems. Octal and hexadecimal numbers. General positional-number-system conversions. Addition and subtraction of nondecimal numbers. Representation of negative numbers. Two's-complement addition and subtraction. Ones'-complement addition and subtraction. Binary multiplication. Binary division. Binary codes for decimal numbers. Gray code. Character codes. Codes for actions, conditions, and states. N-cubes and distance. Codes for detecting and correcting errors. Codes for serial data transmission and storage.3. Digital circuits. Logic signals and gates. Logic families. Cmos logic. Electrical behavior of cmos circuits. Cmos steady-state electrical behavior. Cmos dynamic electrical behavior. Other cmos input and output structures. Cmos logic families. Bipolar logic. Transistor-transistor logic. Ttl families. Cmos/ttl interfacing. Low-voltage cmos logic and interfacing. Emitter-coupled logic.4. Combinational logic design principles. Switching algebra. Combinational-circuit analysis. Combinational- circuit synthesis. Programmed minimization methods. Timing hazards. The abel hardware description language. The vhdl hardware description language.5. Hardware description languages. 5.1 hdl-based digital design 5.2 the abel hardware description language5.3 the vhdl hardware description language5.4 the verilog hardware description language6. Combinational logic design practices. 6.1 documentation standards 6.2 circuit timing 6.3 combinational plds 6.4 decoders 6.5 encoders 6.6 three-state devices 6.7 multiplexers 6.8 exclusive-or gates and parity circuits 6.9 comparators 6.10 adders, subtractors, and alus 6.11 combinational multipliers7. Sequential logic design principles. Bistable elements. Latches and flip-flops. Clocked synchronous state-machine analysis. Clocked synchronous state-machine design. Designing state machines using state diagrams. State-machine synthesis using transition lists. Another state-machine design example. Decomposing state machines. Feedback sequential circuits. Feedback sequential-circuit design. Abel sequential-circuit design features. Vhdl sequential-circuit design features.8. Sequential logic design practices. Sequential-circuit documentation standards. Latches and flip-flops. Sequential plds. Counters. Shift registers. Iterative versus sequential circuits. Synchronous design methodology. Impediments to synchronous design. Synchronizer failure and metastability.9. Memory, cplds, and fpgas. Read-only memory. Read/write memory. Static ram. Dynamic ram. Complex programmable logic devices. Field-programmable gate arrays.index. |
Withdrawn status | Damaged status | Not for loan | Home library | Current library | Date acquired | Source of acquisition | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
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UE-Central Library | UE-Central Library | 06.06.2018 | U.E. | 621.395 W149 | T1709 | 06.06.2018 | 06.06.2018 | Books |