000 | 01930cam a22002537a 4500 | ||
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001 | 1636 | ||
005 | 20210901140550.0 | ||
008 | 030627s2004 njua b 001 0 eng d | ||
020 | _a9788178089942 | ||
040 | _cUE-CL | ||
082 | 0 | 0 |
_a004.65 _222 _bC7325 |
100 | 1 | _aComer, Douglas E. | |
245 | 1 | 0 |
_aNetwork systems design : _busing network processors : Intel IXP version / _cDouglas E. Comer. |
260 |
_aNew Delhi : _bPearson/Prentice Hall, _c2004 |
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300 |
_axxiv, 515 p. _bill. ; _c25 cm. |
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500 | _aincludes bibliography and index | ||
650 | 0 | _aComputer network architectures. | |
650 | 0 |
_aComputer networks _xEquipment and supplies _xDesign and construction. |
|
650 | 0 | _aNetwork processors. | |
650 | 0 | _aSystem design. | |
650 | 0 | _aInternet. | |
942 | _cBK | ||
505 | 0 | _a 1. Introduction and Overview. 2. Basic Terminology and Example Systems. 3. Review Of Protocols and Packet Formats. 4. Conventional Computer Hardware Architecture. 5. Basic Packet Processing: Algorithms and Data Structures. 6. Packet Processing Functions. 7. Protocol Software on a Conventional Processor. 8. Hardware Architectures for Protocol Processing. 9. Classification and Forwarding. 10. Switching Fabrics. 11. Network Processors: Motivation and Purpose. 12. The Complexity of Network Processor Design. 13. Network Processor Architectures. 14. Issues in Scaling a Network Processor. 15. Examples Of Commercial Network Processors. 16. Languages Used for Classification. 17. Design Tradeoffs and Consequences. 18. Overview of The Intel Network Processor. 19. Embedded RISC Processor (strongarm Core). 20. Packet Processor Hardware (Microengines And FBI). 21. Reference System and Software Development Kit (Bridal Veil, SDK). 22. Programming Model (ACE). 23. ACE Run-Time Structure and strongarm Facilities. 24. Microengine Programming I. 25. Microengine Programming II. 26. An Example ACE. 27. Intel's Second Generation Processors. |