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Network systems design : (Record no. 418)

MARC details
000 -LEADER
fixed length control field 01930cam a22002537a 4500
001 - CONTROL NUMBER
control field 1636
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20210901140550.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 030627s2004 njua b 001 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9788178089942
040 ## - CATALOGING SOURCE
Transcribing agency UE-CL
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.65
Edition number 22
Item number C7325
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Comer, Douglas E.
245 10 - TITLE STATEMENT
Title Network systems design :
Remainder of title using network processors : Intel IXP version /
Statement of responsibility, etc Douglas E. Comer.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc New Delhi :
Name of publisher, distributor, etc Pearson/Prentice Hall,
Date of publication, distribution, etc 2004
300 ## - PHYSICAL DESCRIPTION
Extent xxiv, 515 p.
Other physical details ill. ;
Dimensions 25 cm.
500 ## - GENERAL NOTE
General note includes bibliography and index
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer network architectures.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer networks
General subdivision Equipment and supplies
-- Design and construction.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Network processors.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element System design.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Internet.
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Books
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note 1. Introduction and Overview. 2. Basic Terminology and Example Systems. 3. Review Of Protocols and Packet Formats. 4. Conventional Computer Hardware Architecture. 5. Basic Packet Processing: Algorithms and Data Structures. 6. Packet Processing Functions. 7. Protocol Software on a Conventional Processor. 8. Hardware Architectures for Protocol Processing. 9. Classification and Forwarding. 10. Switching Fabrics. 11. Network Processors: Motivation and Purpose. 12. The Complexity of Network Processor Design. 13. Network Processor Architectures. 14. Issues in Scaling a Network Processor. 15. Examples Of Commercial Network Processors. 16. Languages Used for Classification. 17. Design Tradeoffs and Consequences. 18. Overview of The Intel Network Processor. 19. Embedded RISC Processor (strongarm Core). 20. Packet Processor Hardware (Microengines And FBI). 21. Reference System and Software Development Kit (Bridal Veil, SDK). 22. Programming Model (ACE). 23. ACE Run-Time Structure and strongarm Facilities. 24. Microengine Programming I. 25. Microengine Programming II. 26. An Example ACE. 27. Intel's Second Generation Processors.
Holdings
Withdrawn status Damaged status Not for loan Home library Current library Date acquired Source of acquisition Full call number Barcode Date last seen Price effective from Koha item type
      UE-Central Library UE-Central Library 05.06.2018 U.E. 004.65 C7325 T1636 05.06.2018 05.06.2018 Books
      UE-Central Library UE-Central Library 16.08.2018 U.E.13025 004.65 C7325 T4778 16.08.2018 16.08.2018 Books
      UE-Central Library UE-Central Library 25.08.2020 U.E.1597 004.65 C7325 T87 25.08.2020 25.08.2020 Books
      UE-Central Library UE-Central Library 25.08.2020 U.E.1617 004.65 C7325 T11404 25.08.2020 25.08.2020 Books
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